Alif Semiconductor /AE302F80F55D5AE_CM55_HE_View /LPI2S /I2S_RER0

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Interpret as I2S_RER0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)RXCHENX

RXCHENX=Val_0x0

Description

Receive Enable Register 0

Fields

RXCHENX

Receive Channel Enable. This bit enables or disables the receive channel. On enable, the channel begins receiving on the next left stereo cycle. A global disable of the I2S module (I2S_IER[IEN] = 0x0) or the Receiver block (I2S_IRER[RXEN] = 0x0) overrides this value.

0 (Val_0x0): Receive channel disable

1 (Val_0x1): Receive channel enable

Links

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